While semiconductors have taken on widely spanning roles as arithmetic elements and storage devices in personal computers and other computers, due to the rapid spread of mobile communications and to advances in high-capacity communications in recent years, applications in output devices for high-frequency amplification in base stations for these communications forms are broadening quickly.
Semiconductor devices are generally assembled into a package made up of a semiconductor heat-dissipating substrate, as well as input/output terminals and seal rings, and because the Si (silicon)—bipolar semiconductors widely used to date require isolation, they have been populated onto insulating substrates made of a semiconductor substrate onto which BeO (beryllia) is bonded. On the other hand, being that they do not require isolation Si—LDMOS and GaAs—FET semiconductors, outstanding in high-frequency characteristics, may be surface-mounted directly onto semiconductor heat-dissipating substrates.
Nevertheless, attendant on the heightened output from high-frequency devices and semiconductor light-emitting devices in recent years, the amount of heat issuing from these semiconductor components has increased significantly, and consequently packages and heat sinks having heightened heat-dissipating properties are being called for. Given such circumstances, the role of semiconductor heat-dissipating substrates is becoming more and more important; and semiconductor heat-dissipating substrates having further heightened thermal conductivity in order to improve their heat-dissipating properties are being sought.
Moreover, if a package becomes warped, because gaps will arise between it and the semiconductor heat-dissipating substrate—onto which fins or like devices for dissipating heat externally are attached—the heat-dissipating properties will be considerably spoiled. For example, a semiconductor heat-dissipating substrate, after being processed into the necessary form, is normally plated with Ni, whereupon terminals for external connections and seal rings for airtight sealing are bonded in place by brazing and the assembly is made into a package; a heating process is generally included in the Ni-plating procedure, however, in order to improve the adherence of the Ni plating, and due to the impact of the heat warpage is liable to occur in the package.
In brazing, furthermore, it is extremely important that the thermal expansion coefficients of the alumina, beryllia, and Fe—Ni—Co alloys used as the terminals and seal rings that are brazed, and of the semiconductor heat-dissipating substrate are compatible. For example, although copper has a high thermal conductivity of approximately 393 W/m·K, what with its thermal expansion coefficient being a large 17×10−6/° C., it cannot be employed as a semiconductor heat-dissipating substrate. On the other hand, alloys and composites made of copper and tungsten (referred to simply as “copper-tungsten alloys” or “Cu—W alloys” hereinafter), can be made compatible in thermal expansion coefficient with the above-noted materials by changing the copper and tungsten percentage composition; moreover, because of their high rigidity, incidents of warping due to heat are held down, and therefore they are widely employed as semiconductor heat-dissipating substrates.
A method of fabricating semiconductor heat-dissipating substrates from such Cu—W alloys is proposed in Japanese Pub. Pat. App. No. S59-141248. In particular, they are fabricated by pressure-molding a powder in which 0.02-2 weight % of an iron-family metal is added to tungsten powder 1 to 40 μm in average particle diameter, and subsequently sintering it in a non-oxidizing atmosphere into a porous sintered body, which is impregnated with copper in a weight ratio of 5 to 25 weight %.
Likewise, a composite member made of a copper-tungsten alloy is proposed in Japanese Pub. Pat. App. No. H10-280082, the composite/alloy member—in particular, a non-machined or partially machined Cu—W alloy—characterized in that surfaces of the copper and tungsten having no fractured areas are exposed over the entire peripheral surface except for the crossover portions of the plurality of faces, and in that it is not lacking in tungsten grains. The characteristics obtained with Cu—W alloys as determined by this manufacturing process are that with for example an alloy whose thermal expansion coefficient is 6.5×10−6/° C., the thermal conductivity is 210 W/m·K, and that the pre- and post-Ni-plating warpage together is 0.01 mm.
In Japanese Pub. Pat. App. No. H4-348062, furthermore, a heat-dissipating semiconductor-carrier substrate, in which a plurality of Cu—W alloy pieces are overlaid and bonded via copper, is proposed. For example, overlaying a flat plate 1, whose form is 7 mm×7 mm×0.5 mm and whose weight composition is Cu:W=20:80, and a flat plate 2, whose form is 30 mm×11 mm×1 mm and whose weight composition is Cu:W=10:90, with copper foil sandwiched in between, and bonding by heat-fusing the copper foil, yields a substrate stepped in form. After brazing at the same time with an alumina frame and a beryllia plate, actual bottom warpage in the package is supposed to be 0.002 mm or less. Likewise, proposed in Japanese Pub. Pat. App. No. H5-3265 is a composite heat-dissipating semiconductor-carrier substrate, in which porous sintered tungsten parts of two kinds differing in density are overlaid and bonded while simultaneously being infiltrated with molten copper.
In addition, a composite heat-dissipating semiconductor-carrier substrate characterized in that porous sintered tungsten parts of at least two kinds differing in density are bonded by copper-infiltration is put forth in Japanese Pub. Pat. App. No. H5-3265 as well as U.S. Pat. No. 5,481,136. What is proposed is to establish the one to contain 5 to 25 weight % Cu, and the other to contain 40 to 70 weight % Cu. In particular, making the peripheral portion a Cu—W alloy with the greater amount of Cu is supposed to match its thermal expansion coefficient to that of plastic packages or flexible printed-circuit boards and make for improving the reliability of the semiconductors or packages.
Furthermore, in a semiconductor module having a metal substrate that carries a semiconductor laser-diode chip and a lens, and onto the under part of which a Peltier element is adhered via metal solder, Japanese Pub. Pat. App. No. H10-200208 as well as U.S. Pat. No. 6,219,364 proposes that utilizing a metal substrate made from a first metal substance whose thermal expansion coefficient is large, on an encompassing side of side of a metal component whose thermal expansion coefficient is smaller than that of the first metal substance, serves to improve the cooling potential and gains reliance in thermal environments. Brazing or penetrant-bonding the materials are ways proposed for fabricating the metal substrates.
A functionally-graded metal substrate, moreover, is proposed in U.S. Pat. No. 6,114,048. The functionally-graded metal substrate has a structure in which a minimum of two kinds of metal—wherein the thermal conductivity of the middle portion is higher than that of the peripheral portion, while the peripheral portion has a lower thermal expansion coefficient than that of the middle portion—are composited in the horizontal plane (x-y plane) used for mounting semiconductors.